1. Field of the Invention
The invention relates to integrated circuit fabrication, and more particularly to semiconductor devices capable of sustaining high-voltage and methods for fabricating the same.
2. Description of the Related Art
In current integrated circuit processing, controllers, memories, low-voltage (LV) circuits and high-voltage (HV) power devices are largely integrated into a single chip, referred to as a single-chip system. For example, to handle high voltage and current, a DDD (double diffused drain) structure is often used as a source or drain in a high voltage metal oxide semiconductor (HVMOS) transistor. A DDD structure also, in addition to preventing “hot carrier” problems, provides a high breakdown voltage to a HVMOS transistor.
These DDD structures can be formed through a variety of well-known methods. Referring to FIG. 1A, a substrate with an N-well 101 is provided with isolation regions 103 formed thereon. A transistor gate stack 105 is formed on the N-well 101. A source/drain region 111 can be formed by a first implantation. A second implantation and thermal annealing can then form the completed DDD structure 113. That is, in order to obtain a lightly doped P type DDD region of sufficient length, a lengthy thermal drive-in is required. The length of the thermal drive-in, however, also causes a short channel effect and is thus reducing the channel length for scaling is difficult. A semiconductor device having the conventional DDD transistor requires a large cell pitch and is therefore disadvantageous when the size of the semiconductor device is reduced.
Double-diffused metal oxide semiconductor (DMOS) transistors, frequently used as conventional power devices, can operate with low on-resistance while sustaining high voltage. Lateral double-diffused metal oxide semiconductor (LDMOS) transistors in particular have a simple structure suitable for incorporation into VLSI logic circuits, however, they are considered inferior to vertically double-diffused metal oxide semiconductor (VDMOS) transistors because they have high on-resistance. Recently, reduced surface field (RESURF) LDMOS devices, capable of providing low on-resistance, have been introduced and are increasingly used in power devices.
Referring to FIG. 1B a conventional LDMOS device is illustrated in an integrated circuit or semiconductor device 20 with a p-type drain 224 spaced apart from a gate 216 having spacers 220. The transistor is formed over a substrate 240, where a p-type epitaxial (epi) silicon layer 260 is formed over an n-buried layer (NBL) 280. An N-well 212 is formed in the P type epi layer 260, and field oxide isolation structures 210 are formed to isolate the transistor.
A p+ source 222 is formed in the N-well 212 along one side of a channel region 228 of the N-well 212. A P+ drain 224 is formed in the P epi layer 260. The transistor gate stack 216 is formed over the channel region 228 of the N-well 212, which also partially overlies a portion of the P type epi layer 260.
In operation, the spacing of the drain 224 and the channel 228 spreads out the electric fields, thereby increasing the breakdown voltage rating of the device. However, the drain extension increases the resistance of the drain-to-source current path (Rdson), whereby LDMOS device designs often involve a tradeoff between high breakdown voltage BVdss and low Rdson.
The N-well 212 is formed using an implant mask and drive-in process prior to forming the gate stacks 216, to integrate the previously described HVMOS transistor process with the LVMOS transistor process. Thus, a channel length of the channel region 228 is increased improperly during the drive-in process, eventually increasing on-resistance of the LDMOS transistor.
An improved semiconductor device ameliorating the disadvantages of the conventional technology including difficulties sustaining fixed channel length, higher breakdown voltage or lower on-resistance, improving device performance without significantly adding to the cost or complexity of the manufacturing process, and capable of high-voltage operation is desirable.